Chris, it may be that the internals of that chip are generating the 40 MHz
harmonic and it is getting out onto the ground and/or power planes. First
order of business is to have a solid ground plane. Second, is to prevent
noise from the DSP chip from getting on the power plane. Create a +5V island
for the DSP chip with a moat surrounding it. The power from the island is
routed through a ferrite bead/cap filter to the main power plane. Of course
good bypass is required on the island. Good luck.

Richard Woods

----------
From:  Chris Chileshe [SMTP:chris.chile...@ultronics.co.uk]
Sent:  Friday, March 02, 2001 11:13 AM
To:  emc-p...@majordomo.ieee.org
Subject:  CPU clock emissions


Hi group,

It's Friday and thinking hurts the head on a  Friday, so I'll take the
easier
option and just ask.

I have just returned from emissions testing on a new product. The product 
uses a DSP which runs off an 8Mhz oscillator and internally 'ups' this to
40Mhz. It also has a CLOCK_OUT pin which is currently floating. I have 
'beyond the limit' emissions at 40Mhz and higher harmonics of this
frequency.

Has anyone got any good simple, cost effective ideas how to suppress these 
emissions which are apparent in both radiated and conducted emissions? 

Would appreciate your personal experiences on suppressing these 
narrowband emissions are welcome.

Regards

- Chris Chileshe
- Ultronics Ltd



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