>> Disclaimer: I am also a gEDA developer too. >> > > Cool - we got you to de-lurk....
*chuckle* I've been lurking here for two or three years. Someday, when I have scads of time, I want to get a mill and fiddle around with EMC. Right now, however, I have too many other demands on my time. > I've looked at gEDA, not so much for board layout (haven't done any > machining of PCBs yet), but as a tool for doing graphical HAL > configuration. HAL configs are basically netlists, with some additional > info. Others, especially tomp, have taken it farther, and actually have > something working. Knowing that a gEDA developer lurks here might be handy. One of gEDA's big strengths is that the netlister, gnetlist, was architected so that users may write their own back-ends which translate their designs (expressed graphically) into netlists of their own choice. Right now, gnetlist supports about 20 different formats, including gEDA/PCB, SPICE, Pads, Tango, etc. Therefore, writing a back-end netlister takes a block-diagran (drawn using gschem) into a textual HAL description is -- in principle -- easy. One just needs to write some Scheme code. This is a lot easier than it sounds -- just use one of the existing netlisters as a template. Stuart ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
