To accurately read a quadrature signal you must sample it frequently
enough that there is absolutely never more than one input transition per
sample.

Say that your machine has an 8000ns jitter at a 20000ns nominal
base-period.  This means that if you sample at T=0 then the next sample
is at anywhere from T=20000-8000ns to T=20000+8000, even though the
long-term average between samples is 20000ns.

That higher number, 28000ns, corresponds to a frequency of 35.7kHz.  If
you choose your encoder to give a scale of 1000 per mm, that limits your
maximum speed to about 35mm/second.

In practice it's nice to have more than one sample per input transition;
this can give some defense against noise, because noise that affects
only one of the two quadrature signals at a time will not cause
cumulative position loss, as long as there are enough samples to see the
input vary from the true value to the noisy value and back to the true
value -- dividing the earlier figure by 3 gives a speed of 12kHz or
12mm/s in order to have this basic resilience against noise.

This is in contrast to using special-purpose hardware such as an FPGA.
This hardware samples the quadrature signal at a high rate (tens of
MHz), and will often include digital or analog filter components that
limit the quadrature signal to no more than 2MHz.  Still, that is a
speed of 2000mm/second instead of the paltry 12mm/second for software
encoder counting.

In general, buying newer or faster machines doesn't translate to a huge
decrease in jitter or minimum base-period; Intel and AMD simply don't
optimize their CPUs for switching tasks 100,000 or more times per
second, and each transition into realtime code and back to normal linux
code is like two task switches.  Most operating systems will have no
more than a few hundred task switches a second, and users typically
cannot notice when those switches are delayed or advanced a few
milliseconds.

Jeff

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