Someone reading on a parport near/above to max speed could miss a pulse and not know. Shouldnt be doing that but.... Even with a pulse over speed just gives you a drunk thread no error condition.
I cant think how one would set the offsets for a set of plug/middle/taper taps as they wont be consistently on the same helix, a measuring nightmare, use machine taps as they are designed for a single tap to do the work and have the correct swarf clearance flutes for cnc work. Dave Caroline On Wed, Feb 16, 2011 at 5:21 PM, andy pugh <bodge...@gmail.com> wrote: > Is there any reason why it would be a bad idea to derive an index > pulse in software? I am thinking about situations where folk are short > of P-port pins but want to tap/thread etc. > You can do lathe threading with one pulse per rev and a single pin, > but I can't help feeling that multiple pulses and a software-derived > index would work better (whether is is done with modulo division > cobbled together with HAL functions, a custom component, or even a mod > to the existing encoder counter) > > Rigid tapping will always need two pins to sense direction, but unless > people do multi-pass tapping (and I guess they might, with taper, > second and plug (yikes!)) the index serves only to start the cycle so > should be perfectly safe to derive synthetically. > > -- > atp > "Torque wrenches are for the obedience of fools and the guidance of wise men" > > ------------------------------------------------------------------------------ > The ultimate all-in-one performance toolkit: Intel(R) Parallel Studio XE: > Pinpoint memory and threading errors before they happen. > Find and fix more than 250 security defects in the development cycle. > Locate bottlenecks in serial and parallel code that limit performance. > http://p.sf.net/sfu/intel-dev2devfeb > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users > ------------------------------------------------------------------------------ The ultimate all-in-one performance toolkit: Intel(R) Parallel Studio XE: Pinpoint memory and threading errors before they happen. Find and fix more than 250 security defects in the development cycle. Locate bottlenecks in serial and parallel code that limit performance. http://p.sf.net/sfu/intel-dev2devfeb _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
