Mod operation is a counter with reset on TOP value - simple, no 
processor needed. I did those things with logic elements, making 
circuits for some constant TOP value.

Isn't it possible to make lookups in hardware? Demultiplexer connected 
to table storage? How many selecting bits do we need - 3 to 7? How many 
output bits (unsigned int where middle value equals zero current) - 6 to 8?

I understand that multiplication may be the most complex part, where 
single processor on FPGA may be needed.

And 20kHz would be good, but not necessary. maybe 10kHz would be enough.

How do you think how many gates would be needed for 3 axes - 200K, 400K?
I am in ordering process of several 7i43-P cards for up to 3-axis 
machines now. Should I order 7I43-U-4 instead?

Marius

2013.07.11 07:27, Peter C. Wallace rašė:
> This is probably possible (have the driver fill the sine table with encoder
> counts or some fraction) but in any case after you have 2 to 6 sets of these
> per motor systems its a lot of FPGA real estate. Which is why at the required
> update rates (lets say 20 KHz minimum) its going to be less hardware to use a
> soft processor in the FPGA so the multipliers and lookup table and 0,120,140
> offsets and mod operations are all done with shared hardware (a processor can
> be looked at as really just a fancy hardware muliplexing device)



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