I read a very interesting article on Hackaday this morning about the "Secondary Memory Interface" on the Pi. This is a little-known (poorly documented) alternative pin set on the GPIO header that enables a bus-type i/o with up to 18 data bits, 6 address lines, read and write, and DMA request, all with programmable sample and hold times with nsec resolution. This site has lots of info and examples on using it: https://iosoft.blog/2020/07/16/raspberry-pi-smi/
This looks to me like it could be readily used to make a parallel interface to Mesa cards like the 7i90 and 7i43 for very low latency. -- Ralph _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
