> The only thing that will enable on a Northwood core is an assembler > error on the first quad-word instruction, leaq. (See my previous > email.) If it does assemble then it will throw an "invalid op code" > exception when executed. I would be willing to port the pure assembly > stuff, mmx_cmod.S, to SSE for 32 bit if someone would be willing to test > it as my dual PII doesn't have SSE. I have received a couple of private > emails regarding this as well. That is provided that MeJ won't get > annoyed at a fourth implementation that does the same thing. It should > be twice as fast as the MMX/32 one though. >
I'll be more than happy to help you test. I've got 3 SSE based machines and 2 SSE2 (32-bit) based machines. I do have access to some people that would probably lend a hand, if you don't want to go through the trouble. This pending MeJ doesn't mind us tapping into Eterm's code base some more. I'm fine with it like it is though, Eterm runs beautifully on all of my machines, so I can't really complain about the performance. Please don't go through any extra trouble on my behalf... it'll just give me another reason to go by an X86_64 Dual-Core machine. :-) Thanks, Ed ------------------------------------------------------- SF.Net email is sponsored by: Discover Easy Linux Migration Strategies from IBM. Find simple to follow Roadmaps, straightforward articles, informative Webcasts and more! Get everything you need to get up to speed, fast. http://ads.osdn.com/?ad_id=7477&alloc_id=16492&op=click _______________________________________________ enlightenment-devel mailing list enlightenment-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/enlightenment-devel
