Quoth Sven Albert:
> Giving sync0 and sync1 period shouldn't be a problem at all.

True, but it does have surprising behaviour if you haven't read the spec (or
haven't read it carefully enough).  In particular, if you want the actual
sync0 and sync1 periods to be the same (and synchronous), then you have to
*configure* the sync0 period as the desired period and the sync1 period as
0.

And it's very easy to paint yourself into a corner where the master won't be
able to establish a DC lock.


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