Hello

not working is quite a general term. There are about a million ways of getting the thing "not to work" and only a handful to get it "to work".

You must be more specific:
1) is it in OP (ethercat sl)
2) what is the configuration (ethercat config -v)
3) what does the master say (dmesg)
4) increase debugging and check dmesg (ethercat debug 1)

Attached is the (modified) code how EtherLab would configure it. Try to apply this configuration to your setup. I do not claim that this configuration is tested, it is just a hint.

Note that the slave has an input (RxPDO). Some slaves will not go into OP if the input is not configured even though you don't use it!

- Richard

On 02.03.2016 19:25, Luis Matos wrote:
Hello to the list.

We are (trying) to use an EL3318 for temperature read, but it seems that
it is not working.
We setup the thermocouple type correctly (address 80n0:19), but the card
does not respond as it should, even if we connect and disconnect the
thermocouple (nothing varies).

We are currently using the generic driver, analog and digital inputs and
outputs are working.
Does anyone have experience with this card and etherlab's ethercat master?

cheers,
Luis Matos



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/*
 * test_el3318.c
 *
 * Real-Time Workshop code generation for Simulink model "test_el3318.mdl".
 *
 * Model Version              : 1.1
 * Real-Time Workshop version : 7.4.1  (R2009bSP1)  02-Mar-2010
 * C source code generated on : Thu Mar  3 10:23:57 2016
 *
 * Target selection: etherlab.tlc
 * Note: GRT includes extra infrastructure and instrumentation for prototyping
 * Embedded hardware selection: 32-bit Generic
 * Code generation objectives: Unspecified
 * Validation result: Not run
 */

#include "test_el3318_capi.h"
#include "test_el3318.h"
#include "test_el3318_private.h"

/* SDO Configuration for Block: <Root>/EL331x_0 */
static struct sdo_config sdo_config_1[] = {
  { 0x8000, 2, 0U},      /* */
  { 0x8000, 12, 0U},     /* */
  { 0x8000, 21, 0U},     /* */
  { 0x8000, 25, 0U},     /* */
  { 0x8010, 2, 0U},      /* */
  { 0x8010, 12, 0U},     /* */
  { 0x8010, 21, 0U},     /* */
  { 0x8010, 25, 0U},     /* */
  { 0x8020, 2, 0U},      /* */
  { 0x8020, 12, 0U},     /* */
  { 0x8020, 21, 0U},     /* */
  { 0x8020, 25, 0U},     /* */
  { 0x8030, 2, 0U},      /* */
  { 0x8030, 12, 0U},     /* */
  { 0x8030, 21, 0U},     /* */
  { 0x8030, 25, 0U},     /* */
  { 0x8040, 2, 0U},      /* */
  { 0x8040, 12, 0U},     /* */
  { 0x8040, 21, 0U},     /* */
  { 0x8040, 25, 0U},     /* */
  { 0x8050, 2, 0U},      /* */
  { 0x8050, 12, 0U},     /* */
  { 0x8050, 21, 0U},     /* */
  { 0x8050, 25, 0U},     /* */
  { 0x8060, 2, 0U},      /* */
  { 0x8060, 12, 0U},     /* */
  { 0x8060, 21, 0U},     /* */
  { 0x8060, 25, 0U},     /* */
  { 0x8070, 2, 0U},      /* */
  { 0x8070, 12, 0U},     /* */
  { 0x8070, 21, 0U},     /* */
  { 0x8070, 25, 0U},     /* */
};

/* PDO configuration for EL3318
 */
static ec_pdo_entry_info_t pdo_entry_info_2_0cf63052_0[] = {
  { 0x6000, 1, 1 },                    /* 0 */
  { 0x6000, 2, 1 },                    /* 1 */
  { 0x0000, 0, 4 },                    /* 2 */
  { 0x6000, 7, 1 },                    /* 3 */
  { 0x0000, 0, 7 },                    /* 4 */
  { 0x6000, 15, 1 },                   /* 5 */
  { 0x1800, 9, 1 },                    /* 6 */
  { 0x6000, 17, 16 },                  /* 7 */
  { 0x6010, 1, 1 },                    /* 8 */
  { 0x6010, 2, 1 },                    /* 9 */
  { 0x0000, 0, 4 },                    /* 10 */
  { 0x6010, 7, 1 },                    /* 11 */
  { 0x0000, 0, 7 },                    /* 12 */
  { 0x6010, 15, 1 },                   /* 13 */
  { 0x1801, 9, 1 },                    /* 14 */
  { 0x6010, 17, 16 },                  /* 15 */
  { 0x6020, 1, 1 },                    /* 16 */
  { 0x6020, 2, 1 },                    /* 17 */
  { 0x0000, 0, 4 },                    /* 18 */
  { 0x6020, 7, 1 },                    /* 19 */
  { 0x0000, 0, 7 },                    /* 20 */
  { 0x6020, 15, 1 },                   /* 21 */
  { 0x1802, 9, 1 },                    /* 22 */
  { 0x6020, 17, 16 },                  /* 23 */
  { 0x6030, 1, 1 },                    /* 24 */
  { 0x6030, 2, 1 },                    /* 25 */
  { 0x0000, 0, 4 },                    /* 26 */
  { 0x6030, 7, 1 },                    /* 27 */
  { 0x0000, 0, 7 },                    /* 28 */
  { 0x6030, 15, 1 },                   /* 29 */
  { 0x1803, 9, 1 },                    /* 30 */
  { 0x6030, 17, 16 },                  /* 31 */
  { 0x6040, 1, 1 },                    /* 32 */
  { 0x6040, 2, 1 },                    /* 33 */
  { 0x0000, 0, 4 },                    /* 34 */
  { 0x6040, 7, 1 },                    /* 35 */
  { 0x0000, 0, 7 },                    /* 36 */
  { 0x6040, 15, 1 },                   /* 37 */
  { 0x1804, 9, 1 },                    /* 38 */
  { 0x6040, 17, 16 },                  /* 39 */
  { 0x6050, 1, 1 },                    /* 40 */
  { 0x6050, 2, 1 },                    /* 41 */
  { 0x0000, 0, 4 },                    /* 42 */
  { 0x6050, 7, 1 },                    /* 43 */
  { 0x0000, 0, 7 },                    /* 44 */
  { 0x6050, 15, 1 },                   /* 45 */
  { 0x1805, 9, 1 },                    /* 46 */
  { 0x6050, 17, 16 },                  /* 47 */
  { 0x6060, 1, 1 },                    /* 48 */
  { 0x6060, 2, 1 },                    /* 49 */
  { 0x0000, 0, 4 },                    /* 50 */
  { 0x6060, 7, 1 },                    /* 51 */
  { 0x0000, 0, 7 },                    /* 52 */
  { 0x6060, 15, 1 },                   /* 53 */
  { 0x1806, 9, 1 },                    /* 54 */
  { 0x6060, 17, 16 },                  /* 55 */
  { 0x6070, 1, 1 },                    /* 56 */
  { 0x6070, 2, 1 },                    /* 57 */
  { 0x0000, 0, 4 },                    /* 58 */
  { 0x6070, 7, 1 },                    /* 59 */
  { 0x0000, 0, 7 },                    /* 60 */
  { 0x6070, 15, 1 },                   /* 61 */
  { 0x1807, 9, 1 },                    /* 62 */
  { 0x6070, 17, 16 },                  /* 63 */
  { 0x7000, 17, 16 },                  /* 64 */
  { 0x7010, 17, 16 },                  /* 65 */
  { 0x7020, 17, 16 },                  /* 66 */
  { 0x7030, 17, 16 },                  /* 67 */
  { 0x7040, 17, 16 },                  /* 68 */
  { 0x7050, 17, 16 },                  /* 69 */
  { 0x7060, 17, 16 },                  /* 70 */
  { 0x7070, 17, 16 },                  /* 71 */
};

static ec_pdo_info_t pdo_info_2_0cf63052_0[] = {
  { 0x1A00, 8, &pdo_entry_info_2_0cf63052_0[0] },/* */
  { 0x1A01, 8, &pdo_entry_info_2_0cf63052_0[8U] },/* */
  { 0x1A02, 8, &pdo_entry_info_2_0cf63052_0[16U] },/* */
  { 0x1A03, 8, &pdo_entry_info_2_0cf63052_0[24U] },/* */
  { 0x1A04, 8, &pdo_entry_info_2_0cf63052_0[32U] },/* */
  { 0x1A05, 8, &pdo_entry_info_2_0cf63052_0[40U] },/* */
  { 0x1A06, 8, &pdo_entry_info_2_0cf63052_0[48U] },/* */
  { 0x1A07, 8, &pdo_entry_info_2_0cf63052_0[56U] },/* */
  { 0x1600, 1, &pdo_entry_info_2_0cf63052_0[64U] },/* */
  { 0x1601, 1, &pdo_entry_info_2_0cf63052_0[65U] },/* */
  { 0x1602, 1, &pdo_entry_info_2_0cf63052_0[66U] },/* */
  { 0x1603, 1, &pdo_entry_info_2_0cf63052_0[67U] },/* */
  { 0x1604, 1, &pdo_entry_info_2_0cf63052_0[68U] },/* */
  { 0x1605, 1, &pdo_entry_info_2_0cf63052_0[69U] },/* */
  { 0x1606, 1, &pdo_entry_info_2_0cf63052_0[70U] },/* */
  { 0x1607, 1, &pdo_entry_info_2_0cf63052_0[71U] },/* */
};

static ec_sync_info_t sync_manager_2_0cf63052_0[] = {
  { 3U, EC_DIR_INPUT, 8U, &pdo_info_2_0cf63052_0[0] },/* */
  { 2U, EC_DIR_OUTPUT, 8U, &pdo_info_2_0cf63052_0[8U] },/* */
  { (uint8_T)EC_END, },
};

/* S-Function Block: <Root>/EL331x_0
 * Registering EtherCAT block EL3318 with Driver
 */
static struct ec_slave ec_slave_1 = {
  NULL,                                /* Linked list */
  0,                                   /* TID */
  0U, 0U, 0U, 1U,                      /* MasterId, DomainId, SlaveAlias, SlavePosition */
  2U, 0x0CF63052,                      /* VendorId, ProductCode */
  32, sdo_config_1,                    /* SdoConfigCount, SdoVar */
  0, NULL,                             /* SoeConfigCount, SoeVar */
  sync_manager_2_0cf63052_0,           /* SyncManager Configuration */

  { 0, },                              /* Distributed Clock Configuration */
  8, 8, pdo_map_1                      /* RxPdo and TxPdo Pdo count and Configuration */
};
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