VHDL ou VERILOG is not supported for now, but would be indeed very interesting to have...
Stéphane > Le 16 mai 2018 à 17:42, Nycholas Maia <[email protected]> a écrit : > > Hi, > > I would like to put my faust DSP file inside a FPGA. > > Can I compile the faust file to VHDL ou VERILOG file? > > Is there another option to do that? > > Thanks, > Nyck > ------------------------------------------------------------------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, Slashdot.org! > http://sdm.link/slashdot_______________________________________________ > Faudiostream-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/faudiostream-users ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ Faudiostream-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/faudiostream-users
