Dear FFmpeg Community, I am writing to seek technical clarification regarding the VVC (H.266) decoding process when utilizing FFmpeg with Intel's hardware acceleration.
Recently, I have been testing VVC hardware decoding on a newly acquired machine with the following specifications: · *Device:* ASUS Vivobook S 14 S5406SA_S5406SA · *Processor:* Intel(R) Core(TM) Ultra 7 258V (2.20 GHz) · *Integrated GPU:* Intel(R) Core(TM) 140V GPU (16GB) I attempted to play an H.266 encoded video using ffplay, specifically instructing it to utilize hardware decoding via Quick Sync Video (QSV). The command I executed is as follows: *ffplay -loglevel debug -hwaccel qsv -vcodec vvc_qsv -i MIP_B_HHI_3.bit 2> ffmpeg_log3.txt* During playback, I observed active usage data within the GPU's "Video Decode" engine. This observation led me to several technical questions regarding the underlying workflow, particularly because I am aware that FFmpeg also integrates a native VVC software decoder. Could you please help clarify the following points? 1. *Hardware Invocation:* Does the activity observed in the GPU's Video Decode engine definitively indicate that FFmpeg has successfully invoked the Intel GPU's VVC hardware decoding module? 2. *Decoding Entity:* Was the decoding of this specific video entirely executed by the Intel GPU's VVC hardware decoder, or was it processed by FFmpeg's native software decoder? 3. *Division of Labor:* Throughout the entire decoding and playback process, what exact actions are executed by FFmpeg, and what specific actions are handled by the Intel chip? 4. *Data Handoff:* What is the exact output generated by FFmpeg in this scenario, and what is the specific format/nature of the input data that FFmpeg feeds into the Intel VVC hardware decoding module? 5. *Scope of Hardware Acceleration:* When utilizing FFmpeg to call the Intel GPU's VVC hardware decoder, does the hardware module execute the *entire* standard decoding pipeline (from parsing the bitstream all the way to final video reconstruction)? Or is it a hybrid process where FFmpeg handles a portion of the decoding (such as parsing or entropy decoding) in software, leaving the GPU to accelerate only specific subsequent stages? Any insights into the architectural relationship between FFmpeg and the underlying Intel hardware decoder in this specific context would be highly appreciated. Thank you for your time and support. Best regards, Jennie _______________________________________________ ffmpeg-user mailing list -- [email protected] To unsubscribe send an email to [email protected]
