2011/2/20 Raymond Hoogerdijk <[email protected]>: > Hello, > > I would like to flash my BIOS with Flashrom. However I noticed that for the chip on my mainboard write has a '?'. Will it not work then? > > I have enclosed the -Vr output for more information about my system.
flashrom v0.9.3-r1250 on Linux 2.6.18-194.32.1.el5 (x86_64), built with > libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-48), little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OS timer resolution is 2 usecs, 1196M loops per > second, 10 myus = 12 us, 100 myus = 101 us, 1000 myus = 997 us, 10000 myus = > 10143 us, 8 myus = 10 us, OK. > Initializing internal programmer > No coreboot table found. > DMI string system-manufacturer: "MSI" > DMI string system-product-name: "MS-7250" > DMI string system-version: "2.1" > DMI string baseboard-manufacturer: "MSI" > DMI string baseboard-product-name: "MS-7250" > DMI string baseboard-version: "2.1" > DMI string chassis-type: "Desktop" > Found chipset "NVIDIA MCP55", enabling flash write... chipset PCI ID is > 10de:0360, OK. > This chipset supports the following protocols: Non-SPI. > <snip> > Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x9d, id2 0x6e > Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address > 0xfff80000. > Works for me (I've just sent a patch too): flashrom v0.9.3-r1261 on Linux 2.6.37-ARCH (i686), built with libpci 3.1.7, GCC 4.5.2 20110127 (prerelease), little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... delay loop is unreliable, trying to continue OK. No coreboot table found. Found chipset "Intel ICH5/ICH5R", enabling flash write... OK. This chipset supports the following protocols: FWH. Disabling flash write protection for board "ASUS P4P800-VM"... OK. Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to [email protected] if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Flash image seems to be a legacy BIOS. Disabling checks. Erasing and writing flash chip... Done. Verifying flash... VERIFIED. > <snip> > === > This flash part has status UNTESTED for operations: WRITE > The test status of this chip may have been updated in the latest > development > version of flashrom. If you are running the latest development version, > please email a report to [email protected] if any of the above > operations > work correctly for you with this flash part. Please include the flashrom > output with the additional -V option for all operations you tested (-V, > -Vr, > -Vw, -VE), and mention which mainboard or programmer you tested. > Please mention your board in the subject line. Thanks for your help! > Reading flash... done. > Restoring PCI config space for 00:01:0 reg 0x6d > Restoring PCI config space for 00:01:0 reg 0x90 > Restoring PCI config space for 00:01:0 reg 0x8c > Restoring PCI config space for 00:01:0 reg 0x88 > > > Thanks for your help! > > Kind regards, > > Raymond > _______________________________________________ > flashrom mailing list > [email protected] > http://www.flashrom.org/mailman/listinfo/flashrom >
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