At 05:47 PM 1/29/2006, [EMAIL PROTECTED] wrote:
Jim,

Thaks for your input. How does this sound as an idea. We make a litte daughter
board that the VF 200MHz oscillator plugs into that also fits the current
socket on the SDR1000. We add an LVDS driver to the daughter board but only
use one output connected to an SMB connector.  At the FPGA we have an SMB
connector and use one input of an LVDS receiver terminated in 50 ohms and the
other input biased at the correct DC level. I'd rather not use Ethernet
hardware if at all possible due to the size of the connectors.


No.. LVDS is basically a balanced current loop interface that drives + or - 3 mA through the load (nominally 100 ohms). The LVDS driver is a current source, and the receiver measures the +/- 300mV voltage drop across the load resistor. It is NOT a differential voltage interface, and to try and improvise a single ended interface with LVDS is foolish and ill-advised (because you're throwing away everything good about LVDS). The LVDS driver doesn't necessarily have a constant common mode voltage, for instance (because the LVDS receiver doesn't care). If you want a single ended interface, then use a 50 ohm driver and use coax. Use a transformer if you want galvanic isolation with your coax.

If you're not connecting and disconnecting all the time, why not just use a twisted pair and a 2 pin header to send the LVDS? It's not like you're trying to send data with varying bits, just a constant frequency signal. You aren't worried about matching skew or all the other traditional high speed issues, nor do you really care about flat frequency response. Twisted pair is the right characteristic impedance (which is why 100 ohms was chosen for LVDS, by the way), but, you do want to make sure it's not twisted too tight (because that increases the capacitance), and, if you use shielded TP, you want to make sure the capacitance to ground isn't too high.

Any of the differential pair connectors used for MIL-1553 or for PECL would also work.


Jim

Reply via email to