Yes this can be done(if I understand your intention correctly), but it will
only work with the full DRC and not the On-line DRC.
You need to change the rule to a Full check on the component placement rule.
I have a simple PCB as an example. if you want me to e-mail it to you let me
know.
If you use the full check and the batch DRC, it will check the primitives
rather than the bounding rectangle.
Since it is not using the 'bounding rectangle' this means you can make one
component which is a large outline and surround other parts, as long as the
tracks or primitives of the outline itself do not violate the clearance it
will be ok to place it 'on top' of the other components.
You may want to turn component clearance off for On-line DRC and use the
Batch to check this, otherwise the On-line DRC will probably flag them each
time it runs.
I hope that helps.
----------------------------------------------------------------------
Colby Siemer ** Custom Battery Chargers
** Custom Power Supplies
PowerStream Technology ** Custom UPS
140 S. Mountainway Drive ** Custom DC/DC Converters
Orem Utah 84058 ** Power management electronics for OEMs
http://www.PowerStream.com
----- Original Message -----
From: "Jason Morgan" <[EMAIL PROTECTED]>
To: "Protel EDA Forum (E-mail)" <[EMAIL PROTECTED]>
Sent: Thursday, June 28, 2001 7:16 AM
Subject: [PEDA] Placement Rules
> Hi,
>
> Anybody got a workaround for this one?
>
> I wish to place a light guide over 30 SMT LEDs, trouble is component
> clearance placement rules don't allow
> you to ignore one component that covers another.
>
> I can see a couple workarounds, like removing the outline or placing it on
> the underside, but is there a
> better way of removing the resulting DRC error?
>
> J.
>
>
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