On 09/23/2014 11:09 PM, Boian Mitov wrote:
Correct you will lose ~3 assembly instructions (Interlocked
increment/decrement-exchange, and conditional)
With modern x86 archs, interlocked instructions are very expensive in
themselves and can take thousands of clock cycles due to cache
synchronization between all CPUs.
Moreover other archs use completely different (less hardware-driven)
assembler constructs for interlocked operations (e.g. load locked /
store conditional)
-Michael
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