Hi everyone,
Any word on the validity of this ARM / AArch64 optimisation? It's quite
good at increasing speed and shrinking code size by concatenating writes
to the stack, among other things:
https://gitlab.com/freepascal.org/fpc/source/-/merge_requests/104 - the
new CPU feature flag I put in will also mean I can use it on ArmV7A to
improve constant generation (for ARM, it requires at least an ARMV7A
architecture, and for AArch64 it always works).
Gareth aka. Kit
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