On 14/08/2023 21:55, denisgolovan via fpc-pascal wrote:
On 14/08/2023 18:19, denisgolovan via fpc-pascal wrote:
ReadDependencyBarrier - which one is that?
You cannot express a ReadDependencyBarrier in terms of acquire/release.
See e.g. the explanation of "data dependency barrier" at
https://www.sobyte.net/post/2022-08/cpu-cache-and-memory-barriers/ . In
practice, I don't think any currently used cpu architectures still
require such barriers though.
Ok. I assume I got it right.
This field lacks common terms for some reason.
Again: Read, Write, ReadWrite and ReadDependency barrier _are_ common
terms. However, they're computer architecture terms. When using these
barrier functions, you should be familiar with memory models and memory
ordering. Use higher level primitives if you want to reason using higher
level concepts like acquire/release.
Jonas
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