https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=271826
--- Comment #36 from Justin Hibbits <jhibb...@freebsd.org> --- (In reply to Mitch from comment #35) mpc85xx platforms I've personally tested with FreeBSD are the AmigaOne X5000 and AmigaOne A1222. I wrote the mpc85xx timebase sync specifically for those targets, after seeing strange hanging behavior. As for why we want to use memory barriers, we really need just execution barriers (isync), I think, because we need to make sure the timebase is correct before it's unlocked by the BSP. This can only be ensured by using a barrier between setting the timebase and declaring done (atomic_add_int() of cpu_done). But, yes, a weak memory model does mean we need more explicit syncs where on strong models they would be implicit (but pay the penalty on all accesses). We really shouldn't need any syncs for tb_ready, because it can be done lazily. The only sync we should really need is the cpu_done. Before this timebase sync we used a synchronization mechanism at AP launch time, where we simply "hoped" that they were close enough to all get the same timebase. This is obviously problematic. It was changed during the 12-CURRENT time frame. The powermac sync change was done in 2021, though. -- You are receiving this mail because: You are the assignee for the bug.
