On Mon, Mar 04, 2013 at 05:59:48AM +0000, Alexey Dokuchaev wrote:
> On Mon, Mar 04, 2013 at 02:23:28PM +0900, YongHyeon PYUN wrote:
> > Ok, here is final diff which combines two things you've tested.
> > So revert any changes before applying it.
> > Let me know how it goes on your box.
> 
> Hmm, apparently something went wrong, as I'm back to 100baseTX after make
> kernel and reboot...

Hmm, updated diff again.

> 
> ./danfe
Index: sys/dev/ale/if_ale.c
===================================================================
--- sys/dev/ale/if_ale.c        (revision 247382)
+++ sys/dev/ale/if_ale.c        (working copy)
@@ -406,11 +406,13 @@ ale_phy_reset(struct ale_softc *sc)
        CSR_WRITE_2(sc, ALE_GPHY_CTRL,
            GPHY_CTRL_HIB_EN | GPHY_CTRL_HIB_PULSE | GPHY_CTRL_SEL_ANA_RESET |
            GPHY_CTRL_PHY_PLL_ON);
-       DELAY(1000);
+       CSR_READ_2(sc, ALE_GPHY_CTRL);
+       DELAY(2000);
        CSR_WRITE_2(sc, ALE_GPHY_CTRL,
            GPHY_CTRL_EXT_RESET | GPHY_CTRL_HIB_EN | GPHY_CTRL_HIB_PULSE |
            GPHY_CTRL_SEL_ANA_RESET | GPHY_CTRL_PHY_PLL_ON);
-       DELAY(1000);
+       CSR_READ_2(sc, ALE_GPHY_CTRL);
+       DELAY(2000);
 
 #define        ATPHY_DBG_ADDR          0x1D
 #define        ATPHY_DBG_DATA          0x1E
@@ -635,7 +637,7 @@ ale_attach(device_t dev)
        /* Set up MII bus. */
        error = mii_attach(dev, &sc->ale_miibus, ifp, ale_mediachange,
            ale_mediastatus, BMSR_DEFCAPMASK, sc->ale_phyaddr, MII_OFFSET_ANY,
-           MIIF_DOPAUSE);
+           MIIF_DOPAUSE | MIIF_MACPRIV0);
        if (error != 0) {
                device_printf(dev, "attaching PHYs failed\n");
                goto fail;
@@ -1515,6 +1517,7 @@ ale_setwol(struct ale_softc *sc)
                    GPHY_CTRL_HIB_PULSE | GPHY_CTRL_PHY_PLL_ON |
                    GPHY_CTRL_SEL_ANA_RESET | GPHY_CTRL_PHY_IDDQ |
                    GPHY_CTRL_PCLK_SEL_DIS | GPHY_CTRL_PWDOWN_HW);
+               CSR_READ_2(sc, ALE_GPHY_CTRL);
                return;
        }
 
@@ -1547,6 +1550,7 @@ ale_setwol(struct ale_softc *sc)
                    GPHY_CTRL_HIB_PULSE | GPHY_CTRL_SEL_ANA_RESET |
                    GPHY_CTRL_PHY_IDDQ | GPHY_CTRL_PCLK_SEL_DIS |
                    GPHY_CTRL_PWDOWN_HW);
+               CSR_READ_2(sc, ALE_GPHY_CTRL);
        }
        /* Request PME. */
        pmstat = pci_read_config(sc->ale_dev, pmc + PCIR_POWER_STATUS, 2);
Index: sys/dev/mii/atphy.c
===================================================================
--- sys/dev/mii/atphy.c (revision 247382)
+++ sys/dev/mii/atphy.c (working copy)
@@ -100,8 +100,14 @@ atphy_probe(device_t dev)
 static int
 atphy_attach(device_t dev)
 {
+       struct mii_attach_args *ma;
+       u_int flags;
 
-       mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1);
+       ma = device_get_ivars(dev);
+       flags = MIIF_NOMANPAUSE;
+       if ((miibus_get_flags(dev) & MIIF_MACPRIV0) != 0)
+               flags |= MIIF_PHYPRIV0;
+       mii_phy_dev_attach(dev, flags, &atphy_funcs, 1);
        return (0);
 }
 
@@ -287,9 +293,11 @@ atphy_reset(struct mii_softc *sc)
        uint32_t reg;
        int i;
 
-       /* Take PHY out of power down mode. */
-       PHY_WRITE(sc, 29, 0x29);
-       PHY_WRITE(sc, 30, 0);
+       if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) {
+               /* Take PHY out of power down mode. */
+               PHY_WRITE(sc, 29, 0x29);
+               PHY_WRITE(sc, 30, 0);
+       }
 
        reg = PHY_READ(sc, ATPHY_SCR);
        /* Enable automatic crossover. */
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