Hello,
Version 1.61 of if_sis.c breaks support for SiS630, or at least the
one on my laptop. This has been noted before, in
<http://www.freebsd.org/cgi/getmsg.cgi?fetch=1164115+1166406+/usr/local/www/db/text/2003/freebsd-current/20030112.freebsd-current>
I just though I'd add some more details.
The device probe fails with:
sis0: MII without any PHY!
pciconf reports the chip as:
sis0@pci0:1:1: class=0x020000 card=0x020114ff chip=0x09001039 rev=0x82 hdr=0x00
vendor = 'Silicon Integrated Systems (SiS)'
device = 'SiS900 Fast Ethernet/Home Networking Ctrlr'
class = network
subclass = ethernet
Things start to go bad when sis_mii_readreg() ends up in the ack
failure case (around line 622):
/*
* Now try reading data bits. If the ack failed, we still
* need to clock through 16 cycles to keep the PHY(s) in sync.
*/
if (ack) {
for(i = 0; i < 16; i++) {
SIO_CLR(SIS_MII_CLK);
DELAY(1);
SIO_SET(SIS_MII_CLK);
DELAY(1);
}
goto fail;
}
Conditionally reverting part of sis_miibus_readreg() to r1.60 is
sufficient to make things work again:
--- if_sis.c.1.62 Sun Jan 19 14:35:57 2003
+++ if_sis.c Sun Jan 19 15:14:54 2003
@@ -735,6 +735,39 @@
sc->sis_rev < SIS_REV_635 && phy != 0)
return(0);
+#if 1
+ /*
+ * Hack: The new code below does not work with my sis630S.
+ * Revive working code from r1.60
+ */
+
+ if (sc->sis_type == SIS_TYPE_900 && sc->sis_rev <= SIS_REV_630S) {
+ int i, val = 0;
+
+ CSR_WRITE_4(sc, SIS_PHYCTL,
+ (phy << 11) | (reg << 6) | SIS_PHYOP_READ);
+ SIS_SETBIT(sc, SIS_PHYCTL, SIS_PHYCTL_ACCESS);
+
+ for (i = 0; i < SIS_TIMEOUT; i++) {
+ if (!(CSR_READ_4(sc, SIS_PHYCTL) & SIS_PHYCTL_ACCESS))
+ break;
+ }
+
+ if (i == SIS_TIMEOUT) {
+ printf("sis%d: PHY failed to come ready\n",
+ sc->sis_unit);
+ return(0);
+ }
+
+ val = (CSR_READ_4(sc, SIS_PHYCTL) >> 16) & 0xFFFF;
+
+ if (val == 0xFFFF)
+ return(0);
+
+ return(val);
+ }
+#endif
+
bzero((char *)&frame, sizeof(frame));
frame.mii_phyaddr = phy;
If anyone has theories for a more correct patch, I'll be happy to try
them out.
$.02,
/Mikko
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