On Thu, 10 Sep 2009, John Baldwin wrote: > > $ARCH/isa/clock.c::DELAY(). I suppose with a few measurements > > at different HZ values and some back of the envelope calculations > > one could even determine estimate the frequency and duration > > of those SMI interrupts! > > On recent motherboards I have seen the SMI# interrupt fire every 250 > ms with execution times ranging from 50 us to 1ms for the legacy USB > interrupt handler. We consistently see the TSC frequency > miscalculated on the motherboards with the 1ms duration interrupt. I > suspect that the clock that drives the periodic SMI# interrupt is > tied to the i8254 meaning that it often fires at the same time that > the i8254 wraps causing the TSC frequency to often be wrong.
Can the calculation code disable the SMI# interrupt? Disabling legacy USB could be a problem if you want to use a USB keyboard with the loader (I think). -- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C
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