On Wed, Aug 30, 2006 at 11:50:12AM +0400, Gleb Smirnoff wrote:
 >   Pyun,
 > 
 > On Wed, Aug 30, 2006 at 04:30:25PM +0900, Pyun YongHyeon wrote:
 > P> ===================================================================
 > P> RCS file: /home/ncvs/src/sys/dev/bge/if_bge.c,v
 > P> retrieving revision 1.91.2.16
 > P> diff -u -r1.91.2.16 if_bge.c
 > P> --- if_bge.c      10 Aug 2006 11:02:14 -0000      1.91.2.16
 > P> +++ if_bge.c      30 Aug 2006 07:20:43 -0000
 > P> @@ -1007,9 +1007,26 @@
 > P>   /* Set up the PCI DMA control register. */
 > P>   if (sc->bge_pcie) {
 > P>           /* PCI Express bus */
 > P> -         dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
 > P> -             (0xf << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
 > P> -             (0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
 > P> +         uint32_t device_ctl;
 > P> +
 > P> +         /* alternative from Linux driver */
 > P> +#define DMA_CTRL_WRITE_PCIE_H20MARK_128          0x00180000
 > P> +#define DMA_CTRL_WRITE_PCIE_H20MARK_256          0x00380000
 > P> +
 > P> +         dma_rw_ctl = 0x76000000; /* XXX XXX XXX */;
 > P> +         device_ctl = pci_read_config(sc->bge_dev,
 > P> +             BGE_PCI_CONF_DEV_CTRL, 4);
 > P> +         if ((device_ctl & 0x00e0) && 0) {
 > P> +                 /*
 > P> +                  * This clause is exactly what the Broadcom-supplied
 > P> +                  * Linux does; but given overall register programming
 > P> +                  * by bge(4), this larger DMA-write watermark
 > P> +                  * value causes BCM5721 chips to totally wedge.
 > P> +                  */
 > P> +                 dma_rw_ctl |= BGE_PCIDMA_RWCTL_PCIE_WRITE_WATRMARK_256;
 > P> +         } else {
 > P> +                 dma_rw_ctl |= BGE_PCIDMA_RWCTL_PCIE_WRITE_WATRMARK_128;
 > P> +         }
 > P>   } else if (sc->bge_pcix) {
 > 
 > My small penny into the discussion. I was working on reviewing the
 > difference in initializing the PCI DMA control register in Linux tg3.c
 > and in bge(4).
 > 
 > I was quite lost in this stuff, and so I asked for help from David
 > Christensen (davidch@). He has explained me all the differencies
 > in this register between chips and I have prepared the attached patch.
 > 
 > Since I have very small collection of bge(4) cards, I avoid to commit
 > it. May be I will commit it after 6.2-RELEASE if several people test it
 > on their cards and all is OK. And it will live unmerged in HEAD until
 > 6.3-RELEASE.
 > 

Ok, I don't have BCM5752 documentation for the details. Since you've 
got all the secret of the magic I'd like to see the fix from you. :-)

-- 
Regards,
Pyun YongHyeon
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