Hi! The general approach for systems with no hardware cache coherence protocol should be:
Memory to device DMA transfer of a buffer: 1. write all modified cache lines of the buffer back to memory (cache flush for buffer) 2. start DMA transfer Device to memory DMA transfer of a buffer: 1. invalidate the cache of the buffer, here you have to make sure that this buffer does not share a cache line with other buffers (!) 2. start DMA transfer 3. all accesses to the buffer via the cache must wait until the DMA has finished CU -- Sebastian Huber, Embedded Brains GmbH Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany Phone : +49 89 18 90 80 79-6 Fax : +49 89 18 90 80 79-9 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. _______________________________________________ freebsd-usb@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-usb To unsubscribe, send any mail to "freebsd-usb-unsubscr...@freebsd.org"
