> But DIV is slow enough (or irrelevant?) that many RISC cpus don't
> include a hardware DIV instruction. So it is an actual slowdown that
> is, in many cases, not strictly needed. Right?

Beside the fact that this discussion abou DIV is completely irrelevant to the 
" Minor performance anomaly ", newer ARMS *DO* implement DIV

https://developer.arm.com/documentation/100235/0004/the-cortex-m33-instruction-set/multiply-and-divide-instructions/sdiv-and-udiv

Tom



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