Get the ref clock of the PHY from the device tree instead of
hardcoding its name and rate.

Note: This change could break old out-of-tree DTS files that
use the 10nm PHY

Signed-off-by: Matthias Kaehlcke <m...@chromium.org>
Reviewed-by: Douglas Anderson <diand...@chromium.org>
---
Changes in v4:
- none

Changes in v3:
- fixed check for EPROBE_DEFER
- added note to commit message about breaking old DTS files
- added 'Reviewed-by: Douglas Anderson <diand...@chromium.org>' tag

Changes in v2:
- remove anonymous array in clk_init_data assignment
- log error code if devm_clk_get() fails
- don't log devm_clk_get() failures for -EPROBE_DEFER
- updated commit message
---
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 
b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
index 4c03f0b7343ed..2d23372acd20d 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
@@ -91,6 +91,7 @@ struct dsi_pll_10nm {
        void __iomem *phy_cmn_mmio;
        void __iomem *mmio;
 
+       struct clk *vco_ref_clk;
        u64 vco_ref_clk_rate;
        u64 vco_current_rate;
 
@@ -629,8 +630,9 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm)
 {
        char clk_name[32], parent[32], vco_name[32];
        char parent2[32], parent3[32], parent4[32];
+       const char *ref_clk_name = __clk_get_name(pll_10nm->vco_ref_clk);
        struct clk_init_data vco_init = {
-               .parent_names = (const char *[]){ "xo" },
+               .parent_names = &ref_clk_name,
                .num_parents = 1,
                .name = vco_name,
                .flags = CLK_IGNORE_UNUSED,
@@ -786,6 +788,15 @@ struct msm_dsi_pll *msm_dsi_pll_10nm_init(struct 
platform_device *pdev, int id)
        pll_10nm->id = id;
        pll_10nm_list[id] = pll_10nm;
 
+       pll_10nm->vco_ref_clk = devm_clk_get(&pdev->dev, "ref");
+       if (IS_ERR(pll_10nm->vco_ref_clk)) {
+               ret = PTR_ERR(pll_10nm->vco_ref_clk);
+               if (ret != -EPROBE_DEFER)
+                       dev_err(&pdev->dev, "couldn't get 'ref' clock: %d\n",
+                               ret);
+               return ERR_PTR(ret);
+       }
+
        pll_10nm->phy_cmn_mmio = msm_ioremap(pdev, "dsi_phy", "DSI_PHY");
        if (IS_ERR_OR_NULL(pll_10nm->phy_cmn_mmio)) {
                dev_err(&pdev->dev, "failed to map CMN PHY base\n");
-- 
2.20.0.rc1.387.gf8505762e3-goog

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