[Freedreno] [PATCH v9 07/20] drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions()

[Konrad Dybcio]

Unify the indentation and explain the cryptic 0xF value.

Reviewed-by: Akhil P Oommen <quic_akhi...@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dyb...@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index a48f4e3a754a..d5bd008c2947 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1705,17 +1705,18 @@ static void a6xx_llc_slices_init(struct platform_device 
*pdev,
                a6xx_gpu->llc_mmio = ERR_PTR(-EINVAL);
 }
 
-#define GBIF_CLIENT_HALT_MASK             BIT(0)
-#define GBIF_ARB_HALT_MASK                BIT(1)
+#define GBIF_CLIENT_HALT_MASK          BIT(0)
+#define GBIF_ARB_HALT_MASK             BIT(1)
+#define VBIF_XIN_HALT_CTRL0_MASK       GENMASK(3, 0)
 
 void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool 
gx_off)
 {
        struct msm_gpu *gpu = &adreno_gpu->base;
 
        if (!a6xx_has_gbif(adreno_gpu)) {
-               gpu_write(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL0, 0xf);
+               gpu_write(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL0, 
VBIF_XIN_HALT_CTRL0_MASK);
                spin_until((gpu_read(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL1) &
-                                                               0xf) == 0xf);
+                               (VBIF_XIN_HALT_CTRL0_MASK)) == 
VBIF_XIN_HALT_CTRL0_MASK);
                gpu_write(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL0, 0);
 
                return;

-- 
2.41.0