[Freedreno] [PATCH v2 05/14] drm/msm/dpu: handle perf mode in _dpu_core_perf_crtc_update_bus()

[Dmitry Baryshkov]

Move perf mode handling for the bandwidth to
_dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data
and then aggregating known values.

Note, this changes the fix_core_ab_vote. Previously it would be
multiplied per the CRTC number, now it will be used directly for
interconnect voting.

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 37 +++++++++----------
 1 file changed, 18 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 348550ac7e51..42c03a5f1f3e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -116,21 +116,9 @@ static void _dpu_core_perf_calc_crtc(struct dpu_kms *kms,
                return;
        }
 
-       memset(perf, 0, sizeof(struct dpu_core_perf_params));
-
-       if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) {
-               perf->bw_ctl = 0;
-               perf->max_per_pipe_ib = 0;
-               perf->core_clk_rate = 0;
-       } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) {
-               perf->bw_ctl = kms->perf.fix_core_ab_vote;
-               perf->max_per_pipe_ib = kms->perf.fix_core_ib_vote;
-               perf->core_clk_rate = kms->perf.fix_core_clk_rate;
-       } else {
-               perf->bw_ctl = _dpu_core_perf_calc_bw(kms, crtc);
-               perf->max_per_pipe_ib = kms->catalog->perf->min_dram_ib;
-               perf->core_clk_rate = _dpu_core_perf_calc_clk(kms, crtc, state);
-       }
+       perf->bw_ctl = _dpu_core_perf_calc_bw(kms, crtc);
+       perf->max_per_pipe_ib = kms->catalog->perf->min_dram_ib;
+       perf->core_clk_rate = _dpu_core_perf_calc_clk(kms, crtc, state);
 
        DRM_DEBUG_ATOMIC(
                "crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu\n",
@@ -236,17 +224,28 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms 
*kms,
        struct dpu_core_perf_params perf = { 0 };
        int i, ret = 0;
        u32 avg_bw;
+       u32 peak_bw;
 
        if (!kms->num_paths)
                return 0;
 
-       dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), 
&perf);
+       if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) {
+               avg_bw = 0;
+               peak_bw = 0;
+       } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) {
+               avg_bw = kms->perf.fix_core_ab_vote;
+               peak_bw = kms->perf.fix_core_ib_vote;
+       } else {
+               dpu_core_perf_aggregate(crtc->dev, 
dpu_crtc_get_client_type(crtc), &perf);
+
+               avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/
+               peak_bw = perf.max_per_pipe_ib;
+       }
 
-       avg_bw = perf.bw_ctl;
-       do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/
+       avg_bw /= kms->num_paths;
 
        for (i = 0; i < kms->num_paths; i++)
-               icc_set_bw(kms->path[i], avg_bw, perf.max_per_pipe_ib);
+               icc_set_bw(kms->path[i], avg_bw, peak_bw);
 
        return ret;
 }
-- 
2.39.2