Since we don't support and don't use VBIF_NRT, VBIF_RT is the only possible VBIF type. To simplify the driver, drop vbif_idx from the VBIF parameter structures.
Signed-off-by: Dmitry Baryshkov <[email protected]> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 5 +---- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 +---- drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 19 +++++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 11 +++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h | 4 ---- 5 files changed, 14 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c index 73021aaa8d3f..22433bfbea1e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -71,7 +71,6 @@ static void dpu_encoder_phys_wb_set_ot_limit( ot_params.is_wfd = !dpu_encoder_helper_get_cwb_mask(phys_enc); ot_params.frame_rate = drm_mode_vrefresh(&phys_enc->cached_mode); /* XXX: WB on MSM8996 should use VBIF_NRT */ - ot_params.vbif_idx = VBIF_RT; ot_params.rd = false; if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp, @@ -110,14 +109,12 @@ static void dpu_encoder_phys_wb_set_qos_remap( memset(&qos_params, 0, sizeof(qos_params)); /* XXX: WB on MSM8996 should use VBIF_NRT */ - qos_params.vbif_idx = VBIF_RT; qos_params.xin_id = hw_wb->caps->xin_id; qos_params.num = hw_wb->idx - WB_0; qos_params.is_rt = dpu_encoder_helper_get_cwb_mask(phys_enc); - DPU_DEBUG("[qos_remap] wb:%d vbif:%d xin:%d is_rt:%d\n", + DPU_DEBUG("[qos_remap] wb:%d xin:%d is_rt:%d\n", qos_params.num, - qos_params.vbif_idx, qos_params.xin_id, qos_params.is_rt); if (!_dpu_encoder_phys_wb_clk_force_ctrl(hw_wb, phys_enc->dpu_kms->hw_mdp, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 547d084f2944..6d23e10b493b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -374,7 +374,6 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane, ot_params.height = drm_rect_height(&pipe_cfg->src_rect); ot_params.is_wfd = !pdpu->is_rt_pipe; ot_params.frame_rate = frame_rate; - ot_params.vbif_idx = VBIF_RT; ot_params.rd = true; if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp, @@ -402,14 +401,12 @@ static void _dpu_plane_set_qos_remap(struct drm_plane *plane, bool forced_on = false; memset(&qos_params, 0, sizeof(qos_params)); - qos_params.vbif_idx = VBIF_RT; qos_params.xin_id = pipe->sspp->cap->xin_id; qos_params.num = pipe->sspp->idx - SSPP_VIG0; qos_params.is_rt = pdpu->is_rt_pipe; - DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d\n", + DPU_DEBUG_PLANE(pdpu, "pipe:%d xin:%d rt:%d\n", qos_params.num, - qos_params.vbif_idx, qos_params.xin_id, qos_params.is_rt); if (!_dpu_plane_sspp_clk_force_ctrl(pipe->sspp, dpu_kms->hw_mdp, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h index cb24ad2a6d8d..805d117493da 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h @@ -72,23 +72,20 @@ TRACE_EVENT(dpu_perf_set_danger_luts, ); TRACE_EVENT(dpu_perf_set_ot, - TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx), - TP_ARGS(pnum, xin_id, rd_lim, vbif_idx), + TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim), + TP_ARGS(pnum, xin_id, rd_lim), TP_STRUCT__entry( __field(u32, pnum) __field(u32, xin_id) __field(u32, rd_lim) - __field(u32, vbif_idx) ), TP_fast_assign( __entry->pnum = pnum; __entry->xin_id = xin_id; __entry->rd_lim = rd_lim; - __entry->vbif_idx = vbif_idx; ), - TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d", - __entry->pnum, __entry->xin_id, __entry->rd_lim, - __entry->vbif_idx) + TP_printk("pnum:%d xin_id:%d ot:%d", + __entry->pnum, __entry->xin_id, __entry->rd_lim) ) TRACE_EVENT(dpu_cmd_release_bw, @@ -861,17 +858,15 @@ TRACE_EVENT(dpu_rm_reserve_lms, ); TRACE_EVENT(dpu_vbif_wait_xin_halt_fail, - TP_PROTO(enum dpu_vbif index, u32 xin_id), - TP_ARGS(index, xin_id), + TP_PROTO(u32 xin_id), + TP_ARGS(xin_id), TP_STRUCT__entry( - __field( enum dpu_vbif, index ) __field( u32, xin_id ) ), TP_fast_assign( - __entry->index = index; __entry->xin_id = xin_id; ), - TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id) + TP_printk("xin_id:%u", __entry->xin_id) ); TRACE_EVENT(dpu_pp_connect_ext_te, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c index a4c5ca13179b..d33231f1d50b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c @@ -180,8 +180,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms, if (ot_lim == 0) return; - trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim, - params->vbif_idx); + trace_dpu_perf_set_ot(params->num, params->xin_id, ot_lim); vbif->ops.set_limit_conf(vbif, params->xin_id, params->rd, ot_lim); @@ -189,7 +188,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms, ret = _dpu_vbif_wait_for_xin_halt(vbif, params->xin_id); if (ret) - trace_dpu_vbif_wait_xin_halt_fail(vbif->idx, params->xin_id); + trace_dpu_vbif_wait_xin_halt_fail(params->xin_id); vbif->ops.set_halt_ctrl(vbif, params->xin_id, false); } @@ -214,7 +213,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms, vbif = dpu_kms->hw_vbif; if (!vbif || !vbif->cap) { - DPU_ERROR("invalid vbif %d\n", params->vbif_idx); + DPU_ERROR("invalid vbif\n"); return; } @@ -232,8 +231,8 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms, } for (i = 0; i < qos_tbl->npriority_lvl; i++) { - DRM_DEBUG_ATOMIC("%s xin:%d lvl:%d/%d\n", - dpu_vbif_name(params->vbif_idx), params->xin_id, i, + DRM_DEBUG_ATOMIC("VBIF xin:%d lvl:%d/%d\n", + params->xin_id, i, qos_tbl->priority_lvl[i]); vbif->ops.set_qos_remap(vbif, params->xin_id, i, qos_tbl->priority_lvl[i]); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h index 62e47ae1e3ee..f47a89cb34ea 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h @@ -15,24 +15,20 @@ struct dpu_vbif_set_ot_params { u32 frame_rate; bool rd; bool is_wfd; - u32 vbif_idx; }; struct dpu_vbif_set_memtype_params { u32 xin_id; - u32 vbif_idx; bool is_cacheable; }; /** * struct dpu_vbif_set_qos_params - QoS remapper parameter - * @vbif_idx: vbif identifier * @xin_id: client interface identifier * @num: pipe identifier (debug only) * @is_rt: true if pipe is used in real-time use case */ struct dpu_vbif_set_qos_params { - u32 vbif_idx; u32 xin_id; u32 num; bool is_rt; -- 2.47.3
