Ulrich Weigand wrote:

> Black magic?  Actually, a much larger problem would seem to me that
> the PIC vectors are not remapped; this means that IRQ 0-7 generate
> interrupts 0x08-0x0f as set up by the BIOS, overlapping a rather
> important range of exceptions ...   I have no clue how this is sorted
> out, but somehow it appears to work :-/

Something like this would do...

irq0_handler()
{
  u8 isr;

  outpb(0x20, 0x0b); // select in-service register
  isr = inpb(0x20);
  if (isr & 0x01) {
    // real hardware interrupt occurred
    }
  else {
    // processor event occurred
    }
}

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