Glenn, he wants to be a CAT target or host. On Tue, Sep 6, 2016 at 2:51 PM, glen english <[email protected]> wrote:
> and furthermore to my previous USART post > > Eric, you are going to have to implement a USASRT interrupt handler anyway. > why ? > Because you need to handle an error condition as it happens. This is for > any peripheral, DMA or not. > > So, using the usart, just have a single IRQ handler that does everything, > and enable all IRQ flags > so it is a catch all. > > > Now, if you want fast SPI, so 42 Mbps (what I do on all four ports) > I use DMA for transfer , but I still have a interrupt but have the IRQ > flags only for errors- IE normal TXE or RXNE dont generate interrupts (they > trigger a DMA xfer) in that case but ERR does. > > The peripherals are quite complex compared to the AVR days. And poorly > behaved. > > Read the errata for the chip part number you have > With 20 page errata, there will be something affecting what you are > doing.... > > > glen > > > > On 7/09/2016 6:17 AM, [email protected] wrote: > > Yes I was hoping to use a FIFO as that how I do it on the PIC, however was > looking at the datasheet and didnt see any implementation of one, just DMA. > > I will have to look closer. > > Thanks. > > Eric > > > > On 2016-09-06 19:14, Bruce Perens wrote: > > In sm1000? Since there is no OS you either have to hook into the busy loop > or write interrupt code. If the FIFO is deep enough to queue a command, the > code will not be time critical and you can do it in the loop. No DMA > necessary. > > On Sep 6, 2016 7:51 AM, "Shane Burrell" <[email protected]> wrote: > >> You shouldn't have any problems doing that via DMA UART >> >> On Tue, Sep 6, 2016 at 9:52 AM, <[email protected]> wrote: >> >>> I'm wondering if any body has managed to implement the serial USART in a >>> manner that does not interfere with the encode/decode process. >>> >>> Will be doing away with the switch menu and assume I can send and >>> receive data to the USART in its place as the USART functions independently >>> via DMA and hence shouldn't interfere with any thing I hope. >>> >>> I'm basically implementing the Yaesu CAT interface and want to send 5 >>> bytes and receives 5 bytes once a second at 9600 baud. >>> >>> Thoughts? >>> >>> >>> >>> Cheers >>> >>> Eric >>> >>> >>> ------------------------------------------------------------ >>> ------------------ >>> >>> _______________________________________________ >>> Freetel-codec2 mailing list >>> [email protected] >>> https://lists.sourceforge.net/lists/listinfo/freetel-codec2 >>> >>> >> ------------------------------------------------------------ >> ------------------ >> >> _______________________________________________ >> Freetel-codec2 mailing list >> [email protected] >> https://lists.sourceforge.net/lists/listinfo/freetel-codec2 >> >> > ------------------------------------------------------------------------------ > > > _______________________________________________ > Freetel-codec2 mailing > [email protected]https://lists.sourceforge.net/lists/listinfo/freetel-codec2 > > > > > > ------------------------------------------------------------------------------ > > > > _______________________________________________ > Freetel-codec2 mailing > [email protected]https://lists.sourceforge.net/lists/listinfo/freetel-codec2 > > > > ------------------------------------------------------------ > ------------------ > > _______________________________________________ > Freetel-codec2 mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/freetel-codec2 > >
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