The GNU Make manual is quite useful - and very well-written too. Go and
download it and sit down for an afternoon, away from the keyboard, read
sections of it. Good indexes and cross-references too.
I think you probably want to do "make -n", for make to just print out what it
will do, and just read what all the variables expanding to. It is really just
Goal : dependencies How-to-make-goal-from-dependencies
There is a section on implicit variables ($@, $^, $<, $CC) and patterns and
substitutions, (usage of subst).
As I said, it is very well written, and explains a lot of things much better
than I or anybody could ever do in a short e-mail :-).
On Wednesday, 12 July 2023 at 22:58:47 GMT+8, Ahmet Göksu <ah...@goksu.in>
wrote:
actually i am stucked in linking. cc generates object file well but here i am
missing something:
$(LIBTOOL) --mode=link $(CC) $(subst /,$(f),$(LDFLAGS)) $^ -o $@ $(subst
/,$(f),$(FTLIB) $(EFENCE))
tried also this
$(LIBTOOL) --mode=link $(CC) $^ -o $@ $(subst /,$(f),$(FTLIB) $(EFENCE))
and this
$(LIBTOOL) --mode=link $(CC) $^ -o $@
Best,Goksugoksu.inOn 12 Jul 2023 5:33 PM +0300, Hin-Tak Leung
<ht...@users.sourceforge.net>, wrote:
On Wednesday, 12 July 2023 at 21:25:05 GMT+8, Ahmet Göksu <ah...@goksu.in>
wrote:
> but i am stucked to binary.
$(FTBENCH_BIN): $(OBJ_DIR)/ftbench.$(SO)
$(LIBTOOL) --mode=link $(CC) $(subst /,$(f),$(LDFLAGS)) $^ -o $@ $(subst
/,$(f),$(FTLIB) $(EFENCE))
> i am trying to do it same way in the demos, yet didnt figured it out.
I haven't been following your work at all, so I could be wrong. I think you
want to modify the first of the above line to:
$(OBJ_DIR)/$(FTBENCH_BIN): $(OBJ_DIR)/ftbench.$(SO)
...
And elsewhere in the makefile, there should be a pseudo-target of the form:
all : binary1 binary2 binary3 binary4
(in multiple lines continued and separated by "\")
You want to change that to this sort of pattern too:
all : $(OBJ_DIR)/binary1 ...
