------- Additional Comments From bjoern dot m dot haase at web dot de 2005-03-04 19:51 ------- Hi, IMHO everyone working on the avr back-end is aware of this problem. The difficulty is, that the present architecture of the avr back-end does not easily permit to improve this case: Every instruction pattern (like "multiply two 16 bit integers" or "sign-extend a 16 bit variable to 32 bits") presently is free to assume that may overwrite or change r0 and r1 unless it leaves the "__zero_reg__" with 0 after finishing it's task. Resolving this issue, IMHO, would require a major refactoring of the back-end. ... IIUC the keyword is "replace all of the more complex instruction patterns by RTL expressions." I suggest to mark this bug as "desired enhancement". Yours, Björn
-- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20296
