------- Additional Comments From uros at kss-loka dot si 2005-06-22 07:02 ------- As this bug is getting a bit confused, I have summarised testcases below: --cut here-- #include <mmintrin.h> __m64 moo_1 (int i) { __m64 tmp = _mm_cvtsi32_si64 (i); return tmp; }
__m64 moo_2 (__m64 mmx1) { __m64 mmx2 = _mm_unpacklo_pi8 (mmx1, mmx1); return mmx2; } void moo_3 (__m64 i, unsigned int *r) { unsigned int tmp = __builtin_ia32_vec_ext_v2si (i, 0); *r = tmp; } --cut here-- I think that the problems described were fixed by PR target/21981. With a patch from comment #20, 'gcc -O2 -msse3' produces following asm: moo_1: pushl %ebp movl %esp, %ebp movd 8(%ebp), %mm0 popl %ebp ret moo_2: pushl %ebp punpcklbw %mm0, %mm0 movl %esp, %ebp popl %ebp ret moo_3: pushl %ebp movl %esp, %ebp movl 8(%ebp), %eax movd %mm0, (%eax) emms popl %ebp ret I have checked, that there is no SSE instructions present for any of testcases for -mmmx, -msse, -msse2 and -msse3. I suggest to close this bug as fixed and eventually open a new bug with new testcases. Regarding emms in moo_3: As the output of moo_3 () is _not_ a mmx register, FPU mode should be switched to 387 mode before function exit. (In proposed patch, this could be overriden by -mno-80387 to get rid of all emms insns.) -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19530