------- Comment #1 from samuel dot thibault at ens-lyon dot org 2008-11-21 11:16 ------- Just to confirm the bug: the gcc doc says it follows the Intel itanium binary interface. The Intel documentation says « Associated with each instrinsic are certain memory barrier properties that restrict the movement of memory references to visible data across the intrinsic operation (by either the compiler or the processor). » Not including the mfence instruction would let the processor move references across the instruction, so it is mandatory. And that is not only for x86_64, but also x86, on which you can use e.g. a locked nop if you don't know the arch, or a mfence when using -march= (IIRC it appeared with SSE2)
-- samuel dot thibault at ens-lyon dot org changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |samuel dot thibault at ens- | |lyon dot org http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36793