SSE addsubpX does Adds odd-numbered single-precision floating-point values of the first source operand (second operand) with the corresponding single-precision floating-point values from the second source operand (third operand); stores the result in the odd-numbered values of the destination operand (first operand). Subtracts the even-numbered single-precision floating-point values from the second source operand from the corresponding single-precision floating values in the first source operand; stores the result into the even-numbered values of the destination operand.
They are implemented as (define_insn "sse3_addsubv4sf3" [(set (match_operand:V4SF 0 "register_operand" "=x") (vec_merge:V4SF (plus:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")) (minus:V4SF (match_dup 1) (match_dup 2)) (const_int 5)))] "TARGET_SSE3" "addsubps\t{%2, %0|%0, %2}" [(set_attr "type" "sseadd") (set_attr "prefix_rep" "1") (set_attr "mode" "V4SF")]) We have @item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items}) This describes a merge operation between two vectors. The result is a vector of mode @var{m}; its elements are selected from either @var{vec1} or @var{vec2}. Which elements are selected is described by @var{items}, which is a bit mask represented by a @code{const_int}; a zero bit indicates the corresponding element in the result vector is taken from @var{vec2} while a set bit indicates it is taken from @var{vec1}. Is item bit reversed? -- Summary: Incorrect addsub patterns in sse.md Product: gcc Version: 4.4.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: hjl dot tools at gmail dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39327