------- Comment #4 from pinskia at gmail dot com 2009-03-19 16:01 ------- Subject: Re: New: Incorrect code at -O2 and -O3
Sent from my iPhone On Mar 19, 2009, at 8:38 AM, "jk500500 at yahoo dot com" <gcc-bugzi...@gcc.gnu.org > wrote: > The attached test program -- which I extracted and simplified from the > '176.gcc' > SPEC2000 benchmark -- is compiled incorrectly at -O2 and -O3. The > code is > correct at -O1 and -O0. > > The bad code I am reporting here is produced by a MIPS gcc-4.3.3 > cross-compiler. > However, I see the same problem with an in-house port of gcc-4.3.3 > to an > in-house-developed CPU, so I believe the problem is generic to GCC and > not specific to the MIPS version. > > I am attaching the complete testcase (a self-contained C file), but > the > problem is specifically with this C code: > > rtx > rtx_alloc (enum rtx_code jsk_code_arg) { > rtx rt; > struct obstack *ob = &rtl_obstack; > int length; > _obstack_newchunk(ob); > rt = (rtx)ob->object_base; > length = (sizeof (struct rtx_def) - sizeof (rtunion) - 1) / > sizeof (int); > for (; length >= 0; length--) { > ((int *) rt)[length] = 0; > } This is undefined code. The code in spec is known to violate C90/C99/C+ +98 aliasing rules. > > > #ifdef WORKAROUND > /* If enabled, will fix the issue */ > __asm__ __volatile__ ( "sll r0,r0,0" ); > #endif > > rt->jsk_code_val = jsk_code_arg; > return rt; > } > > > The "rt->jsk_code_val = jsk_code_arg" assignment is incorrectly > dropped > from the generated code. As the comment in the C code indicates, if I > insert a volatile asm statement between the zero'ing of the *rt struct > and the jsk_code_val assignment, correct code results at all > optimization > levels. > > At -O2, the MIPS assembly code is below. There is a 'sw' (store 32- > bit word) > instruction near the end that results in the jsk_code_val field being > set to zero rather than to the value of jsk_code_arg. > > rtx_alloc: > .frame $sp,16,$31 # vars= 0, regs= 3/0, args= > 0, gp= 0 > .mask 0x80030000,-4 > .fmask 0x00000000,0 > .set noreorder > .set nomacro > > addiu $sp,$sp,-16 > sw $16,4($sp) > lui $16,%hi(rtl_obstack) > addiu $4,$16,%lo(rtl_obstack) > addiu $16,$16,%lo(rtl_obstack) > sw $31,12($sp) > jal _obstack_newchunk > sw $17,8($sp) > > lw $2,8($16) > lw $31,12($sp) > lw $17,8($sp) > lw $16,4($sp) > sw $0,4($2) > sw $0,0($2) <--- Writes 'jsk_code_val' to zero > j $31 > addiu $sp,$sp,16 > > > > With the WORKAROUND define enabled, the code becomes as shown > below. Now > there is the correct 'sh' (store 16-bit halfword) instruction to set > jsk_code_arg to the value of jsk_code_val. > > rtx_alloc: > .frame $sp,16,$31 # vars= 0, regs= 3/0, args= > 0, gp= 0 > .mask 0x80030000,-4 > .fmask 0x00000000,0 > addiu $sp,$sp,-16 > sw $16,4($sp) > lui $16,%hi(rtl_obstack) > sw $17,8($sp) > move $17,$4 > addiu $4,$16,%lo(rtl_obstack) > sw $31,12($sp) > .set noreorder > .set nomacro > jal _obstack_newchunk > addiu $16,$16,%lo(rtl_obstack) > .set macro > .set reorder > > lw $2,8($16) > sw $0,4($2) > sw $0,0($2) > #APP > # 78 "./gcc0.c" 1 > sll r0,r0,0 > # 0 "" 2 > #NO_APP > lw $31,12($sp) > sh $17,0($2) <--------- sets jsk_code_val to > jsk_code_arg > lw $16,4($sp) > lw $17,8($sp) > .set noreorder > .set nomacro > j $31 > addiu $sp,$sp,16 > > > -- > Summary: Incorrect code at -O2 and -O3 > Product: gcc > Version: 4.3.3 > Status: UNCONFIRMED > Severity: normal > Priority: P3 > Component: c > AssignedTo: unassigned at gcc dot gnu dot org > ReportedBy: jk500500 at yahoo dot com > GCC build triplet: x86_64-unknown-linux-gnu > GCC host triplet: x86_64-unknown-linux-gnu > GCC target triplet: mipsisa32-unknown-elf > > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39504 > -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39504