------- Comment #7 from jakub at gcc dot gnu dot org 2010-03-19 21:14 -------
I really think it is score backend that should be fixed here.
Say the store multiple should be represented with
(insn/f 93 8 94 2 pr43437.c:4 (parallel [
(set/f (mem:SI (plus:SI (reg/f:SI 0 r0) (const_int -4
[0xfffffffffffffffc])) [0 S4 A32])
(reg:SI 12 r12))
(set/f (mem:SI (plus:SI (reg/f:SI 0 r0) (const_int -8
[0xfffffffffffffff8])) [0 S4 A32])
(reg:SI 13 r13))
(set/f (mem:SI (plus:SI (reg/f:SI 0 r0) (const_int -12
[0xfffffffffffffff4])) [0 S4 A32])
(reg:SI 14 r14))
(set/f (mem:SI (plus:SI (reg/f:SI 0 r0) (const_int -16
[0xfffffffffffffff0])) [0 S4 A32])
(reg:SI 15 r15))
(set/f (reg/f:SI 0 r0) ((plus:SI (reg/f:SI 0 r0) (const_int -16
[0xfffffffffffffff0])))
]) 159 {*score.md:3032} (expr_list:REG_DEAD (reg:SI 15 r15)
(expr_list:REG_DEAD (reg:SI 14 r14)
(expr_list:REG_DEAD (reg:SI 13 r13)
(expr_list:REG_DEAD (reg:SI 12 r12)
(nil))))))
assuming the regs are meant to be pushed in that order (or the other order of
the adjustments). No single insn should have more than one side-effect on one
register.
--
jakub at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |liqin at gcc dot gnu dot org
AssignedTo|jakub at gcc dot gnu dot org|unassigned at gcc dot gnu
| |dot org
Status|ASSIGNED |NEW
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43437
