------- Comment #9 from joakim dot tjernlund at transmode dot se 2010-05-20 14:47 ------- (In reply to comment #8) > Has anyone tested if generating an instruction sequence that uses the carry > bit > actually improves performance on modern POWER processors? It reduces the > number of instructions, which is good when optimizing for size, but that may > not necessarily translate to performance. >
On my mpc8321 it is a big difference(don't have numbers handy). Why would such a simply insn be a problem performance wise? I know the kernel still uses the carry insn's for calculating the Internet checksum. I have also noticed that gcc 4.3.4 prefers to do post increment even if I write *++buf, why is that? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43892
