http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831
Summary: avoid if-convertion if the conditional instructions and following conditional branch has the same condition Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassig...@gcc.gnu.org ReportedBy: car...@google.com Target: arm-linux-androideabi Created attachment 23423 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23423 testcase Compile the attached source code with options -march=armv7-a -mthumb -Os, GCC 4.6 generates ras_validate: @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, lr} add r4, sp, #4 movs r2, #4 mov r1, r4 mov r5, r0 bl foo cmp r0, #0 it ge // A movge r6, r0 // B bge .L3 // C b .L7 // D .L4: adds r3, r6, r4 mov r0, r5 subs r6, r6, #1 ldrb r1, [r3, #-1] @ zero_extendqisi2 bl bar adds r3, r0, #1 beq .L2 .L3: cmp r6, #0 bne .L4 mov r0, r6 b .L2 .L7: mov r0, #-1 .L2: pop {r2, r3, r4, r5, r6, pc} Instruction sequence ABCD can be replaced with blt .L7 mov r6, r0 b .L3 In both cases (lt or ge) the executed instructions is not longer than original code. So it's shorter and faster.