http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48037
Richard Guenther <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2011.03.09 10:22:09
CC| |law at gcc dot gnu.org,
| |vmakarov at gcc dot gnu.org
Ever Confirmed|0 |1
--- Comment #2 from Richard Guenther <rguenth at gcc dot gnu.org> 2011-03-09
10:22:09 UTC ---
In theory vsqrt2 should be the best way to encode this but at least at the
tree level we miss the opportunity to re-write x into SSA form. That would
change
__m128d vsqrt2(__m128d) (const __m128d x)
{
__m128d D.5962;
__m128d D.5962;
const double b;
const double a;
const double D.5940;
const double D.5938;
<bb 2>:
D.5938_2 = MEM[(const double *)&x];
a_3 = sqrt (D.5938_2);
D.5940_5 = MEM[(const double *)&x + 8B];
b_6 = sqrt (D.5940_5);
D.5962_12 = {a_3, b_6};
return D.5962_12;
to use
D.5938_2 = BIT_FIELD_REF <x_1(D), 0, 64>
...
not pushing the argument to the stack (well, hopefully).
As of the register moves you are seeing, we have the long-time known problem
that we fail to allocate registers in a way to have the function return
value in-place. Maybe we are just confusing IRA with the explicit move
to that register?
(insn 13 11 18 2 (set (reg:V2DF 72)
(vec_concat:V2DF (reg:DF 67)
(reg:DF 69))) t.c:8 1557 {*vec_concatv2df}
(expr_list:REG_DEAD (reg:DF 69)
(expr_list:REG_DEAD (reg:DF 67)
(nil))))
(insn 18 13 21 2 (set (reg/i:V2DF 21 xmm0)
(reg:V2DF 72)) t.c:10 1127 {*movv2df_internal}
(expr_list:REG_DEAD (reg:V2DF 72)
(nil)))
why is combine not able to change this to
(insn 13 11 18 2 (set (reg/i:V2DF 21 xmm0)
(vec_concat:V2DF (reg:DF 67)
(reg:DF 69))) t.c:8 1557 {*vec_concatv2df}
(expr_list:REG_DEAD (reg:DF 69)
(expr_list:REG_DEAD (reg:DF 67)
(nil))))
? (it doesn't even try this combination)
Does IRA model the cost benefit of coalescing the two registers?
I'm looking at the bit-field-ref issue.
