http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48605
--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> 2011-04-16 10:03:57 UTC --- Author: jakub Date: Sat Apr 16 10:03:53 2011 New Revision: 172583 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=172583 Log: Backported from 4.6 branch 2011-04-15 Jakub Jelinek <ja...@redhat.com> PR target/48605 * config/i386/sse.md (avx_insertps, sse4_1_insertps): If operands[2] is a MEM, offset it as needed based on top 2 bits in operands[3], change MEM mode to SFmode and mask those 2 bits away from operands[3]. * gcc.target/i386/sse4_1-insertps-3.c: New test. * gcc.target/i386/sse4_1-insertps-4.c: New test. * gcc.target/i386/avx-insertps-3.c: New test. * gcc.target/i386/avx-insertps-4.c: New test. Added: branches/gcc-4_4-branch/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c branches/gcc-4_4-branch/gcc/testsuite/gcc.target/i386/avx-vinsertps-4.c branches/gcc-4_4-branch/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c branches/gcc-4_4-branch/gcc/testsuite/gcc.target/i386/sse4_1-insertps-4.c Modified: branches/gcc-4_4-branch/gcc/ChangeLog branches/gcc-4_4-branch/gcc/config/i386/sse.md branches/gcc-4_4-branch/gcc/testsuite/ChangeLog
