http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480
--- Comment #5 from rguenther at suse dot de <rguenther at suse dot de> 2011-09-27 08:57:33 UTC --- On Tue, 27 Sep 2011, kirill.yukhin at intel dot com wrote: > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480 > > --- Comment #4 from Yukhin Kirill <kirill.yukhin at intel dot com> 2011-09-27 > 08:31:35 UTC --- > (In reply to comment #3) > > For 32bit only it seems. Supposedly a cost model issue, the register > > pressure > > will be higher and we have only half the number of SSE regs. > > Richard, what's wrong maybe with cost model? If you're increasing liverange > and > you have not as much registers (32-bit case), obviously register pressure will > increase and degrade performance. But again, how it is connected with cost > model? It's connected to the cost model not modeling the whole vectorized loop but only vectorized statements. So it can't possibly catch this case. I thought of moving more of the cost model details to the target by allowing the target to track the complete loop, like with void * targetm.vectorizer.cost_model_start_loop (struct loop *); targetm.vectorizer.cost_model_stmt (void *, gimple); unsigned targetm.vectorizer.cost_model_finish_loop (void *); where the latter would return a cost for the vectorized loop. We'd need that to model things like PPC having imbalanced resources for some kind of vectorizations as well (shift takes up much resources, so you need other stmts to compensate for it). Richard.
