http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51876
--- Comment #3 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2012-01-17 13:48:12 UTC --- (In reply to comment #2) > Created attachment 26349 [details] > gcc47-pr51876.patch > > Untested fix (well, tested that the ICEs are gone on all these tests with a > cross). vswp just seems to swap two vector registers, so it doesn't matter > which one is the first and which is the second, and the pattern only has two > operands, not 3. > Ramana, could you please bootstrap/regtest it on some real hw? Doesn't matter which order you do the vswp it's just a swap of 2 vector registers. Looks obvious to me. Ramana
