http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52367

             Bug #: 52367
           Summary: Many incorrect thumb insn lengths
    Classification: Unclassified
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassig...@gcc.gnu.org
        ReportedBy: ste...@gcc.gnu.org


Many insns in thumb mode have the wrong length attribute.

A trivial test case shows the problem for a few movsi insns:

$ cat t.c
int a, b, c;

void
foo (int x, int *y, int **z)
{
  a = x;
  b = x + *y;
  c = x + *y * **z;
}
$ ./xgcc -B. -c t.c -dp -o t.o -Wa,-a=t.c.list -mcpu=cortex-a9 -mthumb -Os
$ cat t.c.list 
ARM GAS  /tmp/ccXBH3qs.s             page 1


   1                      .syntax unified
   2                      .cpu cortex-a9
   3                      .fpu softvfp
   4                      .eabi_attribute 20, 1
   5                      .eabi_attribute 21, 1
   6                      .eabi_attribute 23, 3
   7                      .eabi_attribute 24, 1
   8                      .eabi_attribute 25, 1
   9                      .eabi_attribute 26, 1
  10                      .eabi_attribute 30, 4
  11                      .eabi_attribute 34, 1
  12                      .eabi_attribute 18, 4
  13                      .thumb
  14                      .file    "t.c"
  15                      .text
  16                      .align    1
  17                      .global    foo
  18                      .thumb
  19                      .thumb_func
  20                      .type    foo, %function
  21                  foo:
  22                      @ args = 0, pretend = 0, frame = 0
  23                      @ frame_needed = 0, uses_anonymous_args = 0
  24 0000 074B             ldr    r3, .L2    @ 8    *thumb2_movsi_insn/5   
[length = 4]
  25 0002 10B5             push    {r4, lr}    @ 27    *push_multi    [length =
2]
  26 0004 1268             ldr    r2, [r2, #0]    @ 15    *thumb2_movsi_insn/5 
  [length = 4]
  27 0006 1860             str    r0, [r3, #0]    @ 9    *thumb2_movsi_insn/7  
 [length = 4]
  28 0008 0B68             ldr    r3, [r1, #0]    @ 11    *thumb2_movsi_insn/5 
  [length = 4]
  29 000a 064C             ldr    r4, .L2+4    @ 24    *thumb2_movsi_insn/5   
[length = 4]
  30 000c C318             adds    r3, r0, r3    @ 12    *thumb2_addsi_short/1 
  [length = 2]
  31 000e 2360             str    r3, [r4, #0]    @ 13    *thumb2_movsi_insn/7 
  [length = 4]
  32 0010 0B68             ldr    r3, [r1, #0]    @ 16    *thumb2_movsi_insn/5 
  [length = 4]
  33 0012 1268             ldr    r2, [r2, #0]    @ 17    *thumb2_movsi_insn/5 
  [length = 4]
  34 0014 02FB0300         mla    r0, r2, r3, r0    @ 19    *mulsi3addsi_v6   
[length = 4]
  35 0018 034B             ldr    r3, .L2+8    @ 23    *thumb2_movsi_insn/5   
[length = 4]
  36 001a 1860             str    r0, [r3, #0]    @ 20    *thumb2_movsi_insn/7 
  [length = 4]
  37 001c 10BD             pop    {r4, pc}    @ 30    *thumb2_return    [length
= 12]
  38                  .L3:
  39 001e 00BF             .align    2
  40                  .L2:
  41 0020 00000000         .word    a
  42 0024 00000000         .word    b
  43 0028 00000000         .word    c
  44                      .size    foo, .-foo
  45                      .comm    c,4,4
  46                      .comm    b,4,4
  47                      .comm    a,4,4
  48                      .ident    "GCC: (GNU) 4.7.0 20120218 (experimental)
[trunk revision 184372]"

ARM GAS  /tmp/ccXBH3qs.s             page 2


DEFINED SYMBOLS
                            *ABS*:0000000000000000 t.c
     /tmp/ccXBH3qs.s:16     .text:0000000000000000 $t
     /tmp/ccXBH3qs.s:21     .text:0000000000000000 foo
     /tmp/ccXBH3qs.s:41     .text:0000000000000020 $d
                            *COM*:0000000000000004 a
                            *COM*:0000000000000004 b
                            *COM*:0000000000000004 c

NO UNDEFINED SYMBOLS
$ 


The same can happen for at least the following insns:

 611 048c 1A88             ldrh    r2, [r3, #0]    @ 504   
*thumb2_zero_extendhisi2_v6/2    [length = 4]

 293 0202 0130             adds    r0, r0, #1    @ 171    *cmpsi2_addneg/1   
[length = 4]

 3459 190a 61D1             bne    .L921    @ 84    *arm_cond_branch    [length
= 4]

 4220 1eae 79D8             bhi    .L1131    @ 236    *arm_cond_branch   
[length = 4]

 4235 1ecc 6AD1             bne    .L1131    @ 254    *arm_cond_branch   
[length = 4]

 4238 1ed2 67D9             bls    .L1131    @ 258    *arm_cond_branch   
[length = 4]

 4271 1f28 CD1E             subs    r5, r1, #3    @ 718    *subsi3_compare/1   
[length = 4]

 4272 1f2a 6942             rsbs    r1, r5, #0    @ 719    *subsi3_compare/2   
[length = 4]

 4273 1f2c 6941             adcs    r1, r1, r5    @ 720   
*addsi3_carryin_clobercc_geu    [length = 4]

 1374 0972 9847             blx    r3    @ 47    *call_value_reg_thumb2   
[length = 4]

 396 02b8 9847             blx    r3    @ 236    *call_reg_thumb2    [length =
4]

 135 009e 002A                  cmp     r2, #0  @ 40    *thumb2_cbnz/1  [length
= 8]
 136 00a0 33D1                  bne     .L11

 319 0210 0028                  cmp     r0, #0  @ 466   *thumb2_movcond/2      
[length = 10]
 320 0212 18BF                  it      ne
 321 0214 0546                  movne   r5, r0


It can also happen with conditional execution:
 614 0494 0CBF                  ite     eq
 615 0496 DB6B                  ldreq   r3, [r3, #60]   @ 509   *p
*thumb2_movsi_insn/5 [length = 6]
 616 0498 9B69                  ldrne   r3, [r3, #24]   @ 514   *p
*thumb2_movsi_insn/5 [length = 6]

  85 005e 38BF                  it      cc
  86 0060 0020                  movcc   r0, #0  @ 44    *p *thumb2_movsi_insn/2
[length = 6]

Reply via email to