http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52734
vries at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |vries at gcc dot gnu.org
--- Comment #9 from vries at gcc dot gnu.org 2012-03-27 13:05:09 UTC ---
Blocks 3 and 5, with successor 6 are considered equal and merged.
...
# BLOCK 3 freq:6102
# PRED: 2 [61.0%] (true,exec)
# VUSE <.MEMD.1734_10>
dddD.1710_3 = bbbD.1703;
goto <bb 6>;
# SUCC: 6 [100.0%] (fallthru,exec)
# BLOCK 5 freq:2378
# PRED: 4 [61.0%] (false,exec)
# SUCC: 6 [100.0%] (fallthru,exec)
# BLOCK 6 freq:10000
# PRED: 3 [100.0%] (fallthru,exec) 7 [100.0%] (fallthru) 5 [100.0%]
(fallthru,exec)
# dddD.1710_1 = PHI <dddD.1710_3(3), 0(7), dddD.1710_4(5)>
# .MEMD.1734_8 = PHI <.MEMD.1734_10(3), .MEMD.1734_11(7), .MEMD.1734_11(5)>
# VUSE <.MEMD.1734_8>
return dddD.1710_1;
# SUCC: EXIT [100.0%]
...
Tail merge considers 2 blocks equal if the effect at the tail is equal,
meaning:
- the sequence of side effects produced by each block is equal
- the value phis are equal
There are no side effects in block 3 and 5, and the phi alternatives of
dddD.1710_1 for 3 (dddD.1710_3) and 5 (dddD.1710_4) are proven equal by gvn.
The problem is that changing the (4->5) edge into a (4->3) edge changes the
value of dddD.1710_3, because block 4 contains a store that affects the load in
block 3.
...
# BLOCK 4 freq:3898
# PRED: 2 [39.0%] (false,exec)
# VUSE <.MEMD.1734_10>
dddD.1710_4 = bbbD.1703;
# .MEMD.1734_11 = VDEF <.MEMD.1734_10>
# USE = nonlocal null
# CLB = nonlocal null
D.1724_5 = aaaD.1705 ();
if (D.1724_5 != 0)
goto <bb 7>;
else
goto <bb 5>;
# SUCC: 7 [39.0%] (true,exec) 5 [61.0%] (false,exec)
...
