http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53190
--- Comment #9 from Uros Bizjak <ubizjak at gmail dot com> 2012-05-03 09:38:59
UTC ---
(In reply to comment #8)
> So, how should the inline rewritten?
>
> Adding volatile is one option:
> extern __inline __attribute__ ((__always_inline__)) long int
> __attribute__ ((__nothrow__ )) lrintf (float __x)
> {
> long int __res;
> __asm __volatile__ ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x));
> return __res;
> }
>
> Since this is SSE code: Is there any way to clobber the SSE control register?
> Any better way to write the above?
The insn above doesn't clobber SSE CR, but it uses it. But there is no MXCSR
reg listed in gcc ATM. I see no other way to prevent CSE or moves of these
ASMs.
> Btw. I'd like to make two changes for glibc:
> * Fix the inline
> * Only declare the inline when lrintf is not available as builtin. lrint was
> introduce in 2003-08-28, so should be part of gcc 3.4 and therefore for GCC
> 3.4
> and newer my patch will not use the above anymore.
