http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147
Uros Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |4.8.0
Summary|x86: wrong code for 64-bit |[4.8 Regression] x86: wrong
|load |code for 64-bit load
--- Comment #4 from Uros Bizjak <ubizjak at gmail dot com> 2012-11-01 09:27:21
UTC ---
(In reply to comment #3)
> it creates the same number of insns/same quality (just slightly different RA
> decisions/scheduling) for f1-f3, but for f4 without bswapdi2 it creates
> slightly worse code (with bswapdi2 f4 needs just one call saved register,
> without it two, supposedly because both bswap insns are scheduled together.
We can live with that.
I have also checked that removing the pattern doesn't degrade TARGET_MOVBE, the
reason for their existence is PR53227.
Also, a regression from 4.7.
