http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56552



Jakub Jelinek <jakub at gcc dot gnu.org> changed:



           What    |Removed                     |Added

----------------------------------------------------------------------------

                 CC|                            |jakub at gcc dot gnu.org



--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> 2013-03-07 
13:32:30 UTC ---

I had to use -O3 -march=loongson2f to trigger it.



During combine, it seems the combiner figures everything out, but mips.md lacks

needed conditional move patterns:

(insn 36 35 37 2 (set (reg:SI 298)

        (if_then_else:SI (eq:SI (reg:SI 299)

                (const_int 0 [0]))

            (reg/v:SI 194 [ a2+-2 ])

            (reg/v:SI 213 [ a2+-2 ]))) 602 {*movsi_on_si}

     (expr_list:REG_DEAD (reg:SI 299)

        (expr_list:REG_DEAD (reg/v:SI 213 [ a2+-2 ])

            (expr_list:REG_DEAD (reg/v:SI 194 [ a2+-2 ])

                (nil)))))

(insn 37 36 40 2 (set (reg/v:SI 214 [ a2+-2 ])

        (zero_extend:SI (subreg:HI (reg:SI 298) 2))) 188 {*zero_extendhisi2}

     (expr_list:REG_DEAD (reg:SI 298)

        (nil)))



and combiner has:

Trying 36 -> 37:

Failed to match this instruction:

(set (reg/v:SI 214 [ a2+-2 ])

    (if_then_else:SI (reg:SI 299)

        (reg/v:SI 213 [ a2+-2 ])

        (reg/v:SI 194 [ a2+-2 ])))



I.e. it figures that the masking isn't needed, but during

simplification/canonicalization transforms that (ne:SI (reg:SI 299) (const_int

0)) in first argument of IF_THEN_ELSE into (reg:SI 299).

If mips.md had patterns that accepted for movcc the first argument of

IF_THEN_ELSE being a register_operand of GPR mode as if it was (ne:GPR (that

register) (const_int 0)), the testcase would be fixed.

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