http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59754
Bug ID: 59754 Summary: [ree.c] Incorrect merge while working with vector registers Product: gcc Version: 4.9.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: kirill.yukhin at intel dot com Hello, It seems that this revision: git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206418 138bc75d-0d04-0410-961f-82ee72b054a4 made bunch of AVX-512F tests failing (at runtime): The difference in assembler is as following. For good (prev. rev., testname: gcc.target/i386/avx512f-vpmovzxwd-2.c): ... vmovdqa 160(%esp), %ymm0 movl $-22854, %eax leal 384(%esp), %ebx kmovw %eax, %k1 xorl %edx, %edx vpmovzxwd %ymm0, %zmm1 vmovdqa64 %zmm1, 192(%esp) vmovdqa64 256(%esp), %zmm1 vpmovzxwd %ymm0, %zmm1{%k1} vpmovzxwd %ymm0, %zmm0{%k1}{z} vmovdqa64 %zmm1, 256(%esp) vmovdqa64 %zmm0, 320(%esp) ... For broken: ... vpmovzxwd 160(%esp), %zmm1 movl $-22854, %eax leal 384(%esp), %ebx kmovw %eax, %k1 xorl %edx, %edx vmovdqa64 %zmm1, %zmm0 vmovdqa64 %zmm1, 192(%esp) vmovdqa64 256(%esp), %zmm1 vpmovzxwd %ymm0, %zmm1{%k1} vpmovzxwd %ymm0, %zmm0{%k1}{z} vmovdqa64 %zmm1, 256(%esp) vmovdqa64 %zmm0, 320(%esp) ... So it seems that it is allowed to convert: (set r0 [mem]) (set r1 sign_extend (r0)) to: (set r1 sign_extend ([mem])) (set r0 r1) IMHO this should work with scalar, but not with vectors. I suspect eliminating such extends for vector types were prohibited initially.