https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63321
--- Comment #4 from Oleg Endo <olegendo at gcc dot gnu.org> --- (In reply to Oleg Endo from comment #1) > Combine recently received some updates which improve handling of > multiple-set parallel insns. Applying the following: > > Index: gcc/config/sh/sh.md > =================================================================== > --- gcc/config/sh/sh.md (revision 218250) > +++ gcc/config/sh/sh.md (working copy) > @@ -5156,6 +5156,12 @@ > DONE; > } > > + if (operands[2] == const1_rtx) > + { > + emit_insn (gen_shlr (operands[0], operands[1])); > + DONE; > + } > + > /* If the lshrsi3_* insn is going to clobber the T_REG it must be > expanded here. */ > if (CONST_INT_P (operands[2]) > > > will always expand the multiple-set shlr insn and combine will be able to > utilize this. Doing that for the shlr insn is OK, since there is no other alternative to do a 1 bit right shift without touching the T bit. However, since there is a non-T-bit-clobbering shll alternative (add x,x), doing the same for shll might have negative side effects on other sequences.